Z80 Computer on Altera Cyclone III FPGA 3C10 & 3C16

[shanevi]

Started conversion of a basic Z80 System to FPGA after meeting on Saturday.
Z80 CPU running at ~10MHz
16kB RAM based on FPGAs M9K blocks (can have up to ~32kB on this particular device)
8 kB ROM will contain BASIC ROM or CP/M
80 column 640x480 VGA controller

The Board I am using is DE0 from Terasic
http://www.wolftech.net.au/FPGA/index.shtml

Most of these IPs are used in Open Source. Specifically the T80 (Zx80 based CPU VHDL code). The RAM is created through an origainl Quartus Megafunction using the M9K memory of the FPGA for the 16kB RAM. ROM is stored in a similar arrangement.

This is the basic RTL diagram

Z80 RTL

Z80 RTL.jpg (92.58 KiB) Viewed 30620 times

Once the ROM is assembled and working I should have more of a screen shot.
It took most of one afternoon figuring out the problem with pull-ups on the Cyclone III FPGA (has been over a year since using it and most time was on II)

Witnessing the data and address cycle through normally after sending stream to FPGA I felt like Dr. Frankenstein "She's alive"

Hoping a few more days in the back shed should get it going well.... Where the hell is a PS/2 keyboard when you need one

[Jubbp]

Can't wait for a show and tell Shane.

Our August meeting is being replaced by the Science Spectacular but maybe you could bring something along for the September meeting... (Please)

[shanevi]

serious? lol I had a 1 month time frame to get this one going all up... Looks like it'll be 2 projects or advancing this one into smaller FPGA board and enclosure with more I/O and options.

[shanevi]

Off to Perth in a few hours and will be able to collect my much needed PS/2 keyboard to continue development. Sad how when you make something simple, you have ideas to add all sorts of things onto it.. Going for MMU too, this will be an effort too. Maybe will look at bank switching by using a false IO address to set values for bank switching. Will work out this one eventually with a bit of reasearch. Hoping to be almost as simple as setting a value in a location (possibly attached to a latch) to n_CS's of multiple SRAM chips

[parkview]

Hi Shane,

LOL 'Bank Selecting'. I love it. I have a few wonderful Z80 based QX-10 Epson computers that had 256K of RAM that used bank selecting to operate. It's a great computer that I couldn't throw away, perhaps for sentimental reasons as I did so many hardware and software projects back in the early '90's with them. It even had a WYSIWYG word processor. I have link on this page to more info on the computer: http://www.bdug.org.au/project/computing/Z280

Regarding the August meeting at the SW Science Spectacular. Even if the project isn't working, bring it along. Just print out some A4 doco's on it all. You never know who might be interested in it all. I had great fun talking about my upcoming projects.

For those that didn't attend last years event, you can see two photos here: viewtopic.php?f=4&t=16&p=139#p139 I think I took those right at the beginning of the day, just after we setup and before the crowds arrived.

I saw there was a MOOC course recently on the chip set your using, or at least something similar. Its a small world

[shanevi]

I love the Veroboard Z80 computer. The bit with "no internet back in those days" reminds me so much of how resourceful we all were in the 80s and even into the 90s with at best for some, the local library was the only place to get electronics knowledge as well as the few periodicals that came out, Electronics Australia and a couple of the American mags used to adorn my bookshelf.
Though my favourite book from a child was "Build your own Z80 Computer" by Steve Ciarcia. I used to read this over and over dreaming of building my own machine someday
-=-=-=-=-=-=-=-=-

The Z80 on FPGA is coming along now with a modified ROM and RAM. 16kB for each. 8kB ROM was enough to store a BASIC interpreter which had been cut down. To get additional room for growth I started out with 16kB ROM
VGA is displaying text and colours.

Z80 - Colour Screen.jpg (167.82 KiB) Viewed 30595 times

Quick example.
Once again more issues arise. I am not happy with the colours (May have to modify where the RGB bits originate by increasing or reducing magnitude). Playing too much with the VGA will however cause me to think about using the Xilinx FPGA arduino board for video and sound. Would give a much improved graphics display as well as freeing up a little onboard RAM for additional RAM (which on the 3C16 could be brought up to 32kB RAM onboard)

I do want to try to keep everything small (or at least easy to reduce again with little complex modifications) for the moment as I hope to migrate this all back to a Altera 2C5 FPGA which I have on a much smaller board which can still be worked on, though will have to sacrifice the onboard M9K RAM Bank for an actual SRAM PDIP chip. This leaves the ROM still on the FPGA design allowing for easy upgrade of system as a whole.

Another issue that cropped up was the requirement of using ZMASM, which in no incarnation could I get to compile the test source code. After another days worth of googling through pages, I cam across an example of using TASM (old faithful compiler) to compile the Z80 Macro Assembly. Though I needed then to create a Virtual DOS box to run it, as it didn't seem to like Windows 7 x64 much

[parkview]

Sure beats building one from actual hardware. Your progressing well.

Yes, I have that book too, along with a suite of 8080, Z80 and CP/M programming books. Books where very precious things BTI (Before The Internet).

[seaton]

I remember I had a CPM board for my apple II ran wordstar

[parkview]

I had an add on CP/M board for my 1978 Tandy Model I - TRS-80, along with a text to speech synthesiser. There where many happy years playing around with that system.

[Jubbp]

I was playing with Duplo in 1978

[parkview]

Ah, we are ALL on the Big-Escalator-of-Life. Some either a few steps up, or a few steps below As long as we all enjoy the journey!

[shanevi]

lol. I had not even developed the necessary cooridination to play with blocks in '78

Though I do remember the Speech Synth on sale at the local Tandys in Maddington in early 80s. Dreamt of my own HAL9000 then

ICDEFV.jpg (203.06 KiB) Viewed 30573 times

I have migrated from DE0 3C16 to a Cyclone 3C10 board. Reason for going backwards was the availability of more easily accessible peripherals on-board. Namely an already placed RS-232 serial driver and port and a 8 digit multiplexed display (tracing - bit fancy but what the hell). Another advantage is this cheaper Chinese branded board has ability to remove the FPGA board and easily set up in another enclosure should I wish to pursue that down the track.

Disadvantages to this board. No onboard SDRAM for easy development and lower memory onboard (had to sacrifice 16kB ROM space for a lesser 8kB ROM space), though not a major problem, awaiting my order from Microchip of 512kbit Serial SRAM to interface to the FPGA for offboard RAM. These are inteerfaced via SPI. This will give full address range of RAM, and then allowing ROM and fast Video RAM to be left intact on FPGA M9K memories. These Serial RAMs also come in 8pin DIP package so easier to breadboard a Parallel SRAM would be much easier to interface to existing bus, but due to even the lower pin count on the FPGA for exteral I/O I am limited for the ~25 lines needed on parallel.

Hopefully this week I will have a chance now to code in the HDL for serial port and 7seg display drivers.

[shanevi]

Compiling Z80 Assembly
Looking for a decent Z80 crosscompiler.. Spent 3 days searching, downloading and trying. Visiting all the old Z80 pages I knew about.
Even though NASM had been mentioned a few times elsewhere I could not get any code compiled correctly for the Z80.
Finally found the old trusty TASM with Z80 extension. The reason for finding this was due to me not wanting to install another VM just for TASM. This version comes with everything ready to go in any Windows 32 or 64 bit environment.
http://sourceforge.net/projects/tasmforwindows/

SRAM or SDRAM
Having received my 64kBx8 Serial SRAM from microchip (a little PDIP-8 package) I have had very little time or luck interfacing this chip to my current project. However, in the meantime have learnt a bit more about interfacing SDRAM2 memory to FPGA so the memory expansion might flow down this path. Using external SDRAM for program and varible memory. The VideoRAM would remain on the FPGA to reduce latency.

Project tangent time
Whilst all the reading into more advanced Z80 design I have now placed an online order for a couple of 2C5 Cyclone II FPGAs with Header pin connection points. This is going to allow future and final development on a more manageable sized frame. This design has made me look further into a smaller and more reconfigurable computer. I imagine the case size for this, including perhiphal ports (VGA, PS/2, Serial, Power and basic I/O) would be less than about 70-90mm each side

Why I hate reading and exploring
Next project, actually, running concurrently with my Z80 computer is Stereo vision.
2x OVF7670 CCD Cameras
2C5 FPGA

I have old (last year when I purchased 5 of these camera modules) VHDL code which takes the input from the camera and stores in a Framebuffer RAM. Which can then be read by another process for output to LCD/VGA or any other process.
To build 2 of these for stereo input would require less than 400 Gates of the FPGA (minus any memory for frame buffer) so there is plenty of extra room on FPGA for SoC post processing of 2x images. My maths on matrices etc is a little rusty but am sure it will be working again once I sit down and work out how to convert 2 images into a 3D representation of the devices POV.

[shanevi]

Hopefully next month I will get a chance to show this off. :/

[Jubbp]

Good to see/hear you're ok.

Had us a bit worried for a little while...

[parkview]

Hi Shane,

back in the day, I wondered about the Z80 data pins and why they couldn't be presented in a nice sequence like the address pins. I read this interesting post this morning: http://www.righto.com/2014/09/why-z-80s ... mbled.html

[shanevi]

Interesting
Never actually gave it much thought since the Z80 was the dominate CPU I played (actually did HW work with) with back in the day.
Now I know the logic of the Data pins on here and why my ribbon cable on the CPU to buffer line had to be twisted around