Idea for Stereo Vision for Quadcopter, Bot or others. Already had freely availble VHDL code to interface on a Spartan, modified to used Altera Device and only additional module needed to add was a Dual Bus Frame Buffer RAM megafunction.
The first block diagram of what should be happening in almost final revision is below.
Currently I have only 1x CCD Camera input programmed, CCD Preprocessor, Frame Buffer and VGA monitor output on the FPGA.
The current diagram for the preprocessor, Frame Buffer and VGA output are diagrammed in an RTL.
As you can see, the Capture block decodes the CCD input and places it into the frame buffer. On a seperate unit (the VGA module) it reads the contents of this Frame Buffer memory as needed and outputs to VGA display in a RGB (3/3/2)
The biggest hurdle I thought would be the Central unit which combines the images to process into a depth map. Originally thinking to use Alteras NIOSII CPU but a coincidental find changed my mind for hard logic. Whilst watching a Maker Faire NY 2013 video on FPGA vision in the background came across this guy in France who has already developed quite a few filters and routines for Computer vision on an FPGA.
https://github.com/jpiat?tab=repositories
Will download and look into over the next few days. First to get the CCD hooked to the FPGA board to test the actual first channel
