My Z80 Computer build

[shanevi]

And yet another Z80 computer build. This time I decided to go old skool
This is the second time I've built a Z80 system. The first one was back about 20 years ago. Long gone during many moves.

As with most projects I start stages with breadboarding and move over to my lovely stripboards
Computers are great as each part can be built in stages, tested and applied. Firstly is the clock circuit. I chose 2MHz, as it was the only crytal under 4MHz I had on hand.
Building the test on Breadboard worked fine. Frequency stable roughly 2MHz according to one of my most useful tools (Buspirate)

The below is schematic for my clock circuit. Nice and simple

Clock Schematic

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Then to move the working circuit over to a more semi-permanent stripboard. The jumper wires on the board are only temporary. Enough to power up the clock and give me an easily accessible point to test the output.

Veroboard Clk

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The first problem I realised (as the famous law states, nothing works the first time) was a very unstable clock. Measuring from 500kHz up through past 30MHz.

Read from clk on Veroboard before and after

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The first few probes of pin 4 from the HC04 invertor were erratic. Originally I thought it may have been interference from adjoining uncut tracks.
After plugging in the microscope and looking at my solder joins I noticed one of the 22pF caps was not even soldered correctly and had an intermittent join to the circuit. Removing the cap and a bit of fine sand paper and resolder worked nicely. The last 4 probes were after the correction. And remained stable after switching off and on and running for a few minutes so I was happy with my oscillator circuit. The oscilloscope I have only measures as far as 1Mhz so I can not see if it is a good 50% duty square wave. Hence I will build the Z80 CPU onto breadboard and tie data into NOPs and use the clock to drive the processor. Fingers crossed it should cycle through it's address lines executing NOPs

[shanevi]

A few hours later I quickly put together a circuit to test one of the near 25 year old CPUs I have in possession.
Tie all Data pins to ground, creating a permanent $00 each time the CPU reads the data line. A few LEDs on the LSB off Address lines to monitor and an Arduino to provide the 2Hz clock pulse (slow enough to see what the CPU is doing) and yes, it is cheating but it was the quickest way to execute a clock cycle of my choosing. A few lines of code and away it pulsed
To get the CPU reset correctly I needed to hold the Reset pin to ground for about 3-4 clock cycles. Once this was reset, releasing allowed the CPU to start reading from 'memory'... Actually just a whole bunch of NOPs. The 2x LEDs I had on A0 and A1, worked as intended. Address bus going up from $0000 to $FFFF.

Z80 CPU test

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A short youtube video of the initial test. Actually not the first one, had problems remembering that had to hold reset for a few cycles
http://youtu.be/R5GZ23CQU1w

[shanevi]

Z80 Data lines... Why?! :D

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And why are the Z80 Data lines like they are again? :/ lol

Z80 Template

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One thing I have learnt when breadboarding digital electronics is to create little templates (in reverse) for the underside of the board. This allows easier wiring to various chips on the board.
This particular project I have opted to put the data lines on top through hole, and run the address lines from underneath. Much less mess that way.
I print them so that there is an approx gap between the printed pins of 0.1 inch as standard.

underside with chip templates

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One other current hurdle I have now faced whilst sorting through rest of parts from base schematic is a 7432 Quad OR Gate, which was the simplest way to implement the Memory and IO W/R Decoding. I have a few CMOS devices but from experience CMOS rarely drives more than a few TTL gates, so I will have to redesign that section. At minimum I think it is going to take another 7404 Hex inverter and a Quad 2-input NAND gate. Plenty of board space still for that alteration.

[shanevi]

The wiring for address lines from CPU to EEPROM to SRAM are all done top and bottom. Have yet to terminate tracks

Address and Data lines wired up

undersideaddressanddata.jpg (189.75 KiB) Viewed 29331 times

Top side of board showing wired data lines. I have sitting on top of the board my EPM570 CPLD...
I still haven't aquired a Quad OR TTL, nor sat down and design another solution, however, thinking of using this CPLD I can forgo the clock circuit completely and mount and wire up the board to my Z80 board. Off top of my head are A15, A0-A6, D0-D7, *WR, *RD, *IORQ and *MREQ. lines from CPU. The CPLD could divide it's clock to run the Z80 (possibly by 16 giving about 3MHz), also decode the IO and Memory requests and depending if there is much logic left on the device some Serial or Parallel I/O.
I am only entertaining this idea as it is a quick simple solution and I have had this device in my possession for nearly a year with no major projects used. And I think perhaps it may only be 3.3V and no 5V pins. I will have to look at Alteras 500+ page datasheets to work that out

*** And after reading the data sheet the CPLD handle only 3.3V and 4.8V maximum.. which is all still below the TTL of 5V for Z80 and Memory. Back to the OR gate idea***
It was a good idea at the time, i believe xilinx do a 5V CPLD but hard to source from what I've heard. And probably easier just to go back to the 7432 way. Though in the mean time Have had idea to incorporate a 18F4550(3) as a IO point. Use it's build in USB, also to decode LCD/VGA signals. Not 100% sure on which direction i am going there. LCD may be a bit more complicated, though would mean more portability.

Address and Data lines wired up on top. CPLD Maybe?

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[shanevi]

A mid-project redesign of the main board

Z80 system using ATMega328

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I have gone with using a ATMega running at 16MHz to drive the logic for Memory and IO decoding.

A short programming running in loop on uController checks inputs and outputs corresponding outputs accordingly. Using this uC allows for possibility in future to incorporate some more advanced bank switching just by modifying the program.

Logic IO truthtable

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The first truth table I came up with to work out the code I need to write.

[BeJay]

Love your work Shane,

This is quite neat indeed. Do you have any trouble getting the 2Mhz crystal to oscillate with just an inverter? I tried that years ago and couldn't get it to start every time without fail... I think it was the lack of capacitance to ground to get it running from memory Anyway really cool project, and can't wait to see it. Are you bringing it to Robofair?

Cheers

BeJay

[shanevi]

Hi BeJay,

I did have a problem in the beginning, reports of oscillation at 20-32MHz from my buspirate. definitely not right. One of the caps on the oscillator wasn't making a good connection. I know from experience, that these oscillator setups that is that the caps are a necessity. Apparently it will still oscillate... Occasionally, it needs the ground caps to initiate the oscillation of the crystal.
I am currently writing up the short code to run the atmega address/io decoder. It also serves as the start up reset. I am also looking at using this as the clock generator for the Z80 itself in the future. This would allow some simple clock adjustment via software access to an IO port write.
I am not sure of Robofaire yet, as just starting new job (at Jaycar Bunbury) so if they were to ask me to work a weekend it'd be hard to say no :/
But looking forward to getting this going for the next meeting.

[BeJay]

Using the atmel as a clock source sounds like the go!

[shanevi]

Just had a chance to sit down in the last few days and quickly reasearch the atmega timers

http://arduino-info.wikispaces.com/Timers-Arduino <--- seems like a good starting point for what I need

I have done quite easily in PIC, set a timer to run dividing clock frequency and drive other processors etc while main program runs but wasn't sure about the mega328. But seems it can according to a quick read of this page. Exactly what i want
Might work out the clock source after i get the decoding working

Though now I think I might use the uC as a clock source as it will cut out one addition ttl gate. I can reclaim the 7404 on the board

And this is the code from what I have found to generate a 2MHz (given 16MHz clock) output on pin 5 of ATmega328 uC. Would just require one rewire of my orginal schematic but eliminates the clock circuit

Code: Select all

const int freqOutputPin = 3;  
const int ocr2aval  = 3; 

void setup()
{
   pinMode(freqOutputPin, OUTPUT);
   TCCR2A = ((1 << WGM21) | (1 << COM2B0));
   TCCR2B = (1 << CS20);
   TIMSK2 = 0;
   OCR2A = ocr2aval;
}

void loop(){
  // Program for logic goes here ;)
}

[shanevi]

Arduino works great as a 2MHz clock generator. A good clean 1.9998 MHz clock output from pin 5 with a 49.9% duty cycle. Clean enough
Though I am seriously contemplating going straight to using my recently acquired OR gates to do the decoding for memory and IO once again (the uC runs as a decoder up to about 500kHz) and free up the 7404 and run the clock and reset generation from an ATMega328 on board. Looks like my Saturday off this week (first day off in 10 days) will be spent building upon this.

[shanevi]

Due to the latency on the ATMega328 (which I had a feeling it would be in simulation) I have reverted back to a 74hc32 as the IO and Mem decoder, However I have kept the ATMega in circuit as a very reliable adjustable clock source and boot reset. I have also provisioned for the next expansion (IO), using headers for A0-A6, D0-D7, *IORD, *IOWR and other a few other pins broken out from the main board.
I am hoping to complete on my couple days off this weekend. Once done, I will just run another program which will write and read to RAM and monitor the process at a slower clock speed (hence advantage of reprogrammable uController on the board. )
The schematic is a bit of a mess of wires but it was done late at night and only a reference for the build

v2 of schematic

Z80 System v2.jpg (215.45 KiB) Viewed 29275 times

[shanevi]

Moving along not as fast as I had hoped this weekend

I did manage to wire up the missing links and pieces, terminating most tracks where they need to be and just checking random points. uController has still a couple missing routes. I have also added, modifyed schematic on the fly, 3x 4k7 pullup resistors on *WAIT *INT and *NMI, rather than tieing straight to Vcc. This allows easier incorporation should I wish to use this pins later.

Top view

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Bottom view. Wires, partial continuity test done

bot v2.jpg (183.37 KiB) Viewed 29275 times

Next will be to connect up the power rails to various chips and power up and check for more shorts and discontinuities.
Once that is tested okay, I will place chips in position. Likely starting with a programmed atmega328 and 7404 inverter and check the clock and reset circuitry. Then will connect Z80 and memory and hopefully run some NOPs at a low clock speed and check the addresses once again. Once tested okay, then to develop a simple program. I don't envy the engineers of yesteryear

[parkview]

Nice project work there Shane. Let me know if you need any TTL LS chips. I have 3000+ of them that I picked up from Silicon Valley back in the early '90s. I even indexed them all via my Z80 based Epson QX-10 PC. I think I still have the print out somewhere

Looking fwd to seeing it at a meeting one day.

[shanevi]

Thanks for that

I got my needed 7432 once Jaycar opened Though you should probably built a TTL gate computer out of all you gates would make an awesome project

I have written a quick test for the LED monitor, 2MHz Clock and Reset Hold signal.
The code is a bit dirty but it is only important, for now, to output steady clock from Timer, Reset and loop for LED monitor.

Code: Select all

const int freqOutputPin = 3;  
const int ocr2aval  = 3; 

void setup()
{
   pinMode(freqOutputPin, OUTPUT);
   TCCR2A = ((1 << WGM21) | (1 << COM2B0));
   TCCR2B = (1 << CS20);
   TIMSK2 = 0;
   OCR2A = ocr2aval;
}

int led = 13;
int res = 8;
int count = 1;

void loop(){
   //
   // Do just about anything you want to here, but if you mess
   // with Timer 2, you may affect the output on its OCR pin.
   //


   // Start Reset Process - approx 3-4 seconds

digitalWrite (res, HIGH);

while (count < 10) {
  digitalWrite (led, HIGH);
  delay(200);
  digitalWrite (led,LOW);
  delay(200);
  count = count +1;
}

   // Turn pin 14 to '0' to bring CPU out of reset
   // Flash LED on pin 19 signifying out of reset and normal operation

digitalWrite (res,LOW);

while (count < 20) {
  digitalWrite (led, HIGH);
  delay(200);
  digitalWrite (led,LOW);
  delay(800);

}
   // Output '1' pin 14 for 1 second
   // Hold in reset whilst clock oscillates on timer :)

}

Freq and Duty output from ATMega Clk Output

ClockReportFinalTest.jpg (122.12 KiB) Viewed 29275 times

The Test of the Programmed code from ATMega328 uController shows the frequency output.
I have checked and confirmed the power lines on the mainboard - no shorts, no apparent crossover. I have not yet applied power, I will check one more time once I have double checked the uController circuit on board.

[shanevi]

Tonight I did final test on power and for shorts.
ATMEga328 was programmed with my program, plugged into the z80 main board and powered up. The LED flashing is just a late addition to get a feedback from uController.

Video is located here showing the power up and cycle from Reset hold to Regular operation and clock pulse. The LED is run from two steps of program just to indicate the point of the program running. I had my frequency counter attached to pin 6 of Z80 socket to check the clock pulse out from my uController. Next to add OR Gate, Z80, Memory and hopefully get my EEPROM programmer working on another machine to create a short program to test the mainboard operation.

http://youtu.be/2l2jZ3N41QM

This is fun